Authors: Pradeep Balaji and André Augusto
Solar Power Laboratory, Arizona State University
The photovoltaic industry, just like any other industry, is driven by profit. The PV industry is always exploring innovative manufacturing processes, new materials, solar cells and modules designs to maximize the device performance and lower the final energy cost. Silicon heterojunction solar cells (SHJ) is a promising candidate for cost-effective high-efficiency solar cells. The high performance is driven by a superior surface passivation provided by the solar cell structure where a thin silicon amorphous buffer layer separates the bulk from the highly recombinative metallic contacts. As a result, open-circuit voltages (VOC) over 750 mV are possible using this type of structure. SHJ solar cells are part of a larger family known as passivated contacts solar cells. The term heterojunction derives from the fact that the junction P-N is formed using silicon with two different morphologies, i.e. the absorber is n-type crystalline silicon (c-Si) and the p-region is formed by p-doped amorphous silicon (a-Si).
The competitive advantages of SHJ cells are:
- Extreme good surface passivation enabling these cells to aspire efficiencies close to the intrinsic limit for silicon solar cells (for instance PERC cells cannot reach the intrinsic efficiency ceiling due the usage of silicon-metal contacts);
- All manufacturing processes are at low temperature (<300 °C) reducing the manufacturing energy budget, and make these cells particularly suitable for tandem arrangements with temperature sensitive materials (e.g. perovskites);
- In contrast to devices based on homojunction silicon technology, that exhibit temperature coefficients of −0.45%/°C (standard homojunction) to −0.35%/°C (homojunction with passivated contacts), SHJ exhibit excellent temperature coefficient of −0.23%/°C . This means that at actual field operation temperatures (up to 80 °C), SHJ solar cells have a relatively higher performance, resulting in higher energy yields, and possible lower levelized cost of electricity (LCOE).
II. Past and Future
The first heterojunction device was reported in 1983 with efficiency over 12% . In the early 1990’s Sanyo (recently acquired by Panasonic) developed their own design, the HIT® solar cell (Heterojunction with Intrinsic Thin-layer). Sanyo introduced a thin intrinsic a-Si buffer layer between the doped emitter and the substrate drastically reducing the recombination at the surface . Recently, Kaneka Corporation achieved an efficiency 26.7 % for 79 cm2 solar cell, which is the current world-record silicon solar cell . To maximize the short-circuit current, all the contacts were placed on the back of the cell. This result is getting very close to the fundamental one-Sun limit of ~29% for single junction silicon solar cells. 
The recent records put the SHJ cells in the spotlight but also brings some questions about their reliability and manufacturing costs. There are questions regarding the cost and reliability of the transparent conductive oxides and passivating interface materials. How to improve the metallization that impacts every aspect of the cell and module. The standard silicon solar cell manufacturing process uses high-temperature processes (>800 °C) to form the front Ag contacts using screen printing pastes. Such pastes cannot be applied on standard SHJ as they cannot handle high-temperature processes (>300 °C). Low-temperature pastes are more expensive and they are not as conductive as high-temperature pastes. But there are also exciting opportunities such as the use of thin wafers that require superior surface passivation (enabling lower cost and flexible solar cell for new applications)  and the interest of using SHJ as bottom cells of perovskites .
III Solar cell structure
Silicon heterojunction solar cells are formed by n-type c-Si absorber wrapped with intrinsic and doped layers of a-Si forming a p/i/n/i/n stack. Bare a-Si is highly defective. By hydrogenating the a-Si the defects density decreases dramatically. Hydrogenated amorphous silicon (a-Si:H) films of a few nanometers thick are suitable candidates for buffer layers: their bandgap is slightly wider than c-Si and they can be doped relatively easily, either n– or p-type, enabling the fabrication of electronic heterojunctions . The intrinsic a-Si:H layers provide surface passivation, the p-doped a-Si:H forms the PN junction, and the n-doped a-Si:H layer provides surface passivation. The conductivity of a-Si:H films is very poor and insufficient to provide a good carrier collection by the metal contacts. For this reason a transparent conductive oxide (TCO) film is deposited on top of the amorphous layers. The TCO facilitates lateral carrier transportation, promotes a good ohmic-contact, and works as antireflecting coating (similar to SiNx). There are many options of TCO, indium tin oxide (ITO) is one of the most widely used TCOs. Due to its quasi-symmetrical structure these cells are particularly suitable for bifacial applications. In Figure 1 a simple structure of a SHJ with silver back reflector is shown.
Figure 1. Example of one of the SHJ cell structures manufactured at Arizona State University 
IV Manufacturing process
The wafers are textured using alkaline wet etching (KOH or NaOH solution), and followed by wet chemical cleaning. The junction is formed using plasma enhanced chemical vapor deposition (PECVD) to grow few nm of intrinsic and doped a-Si:H layers on both sides of the c-Si wafer, forming a p/i/n/i/n stack. Subsequently, the ITO layer is sputtered on both sides of the wafers. In Figure 1 we can see that the TCO thickness at the front and rear is different. The front ITO thickness and oxygen content are optimized to promote a suitable sheet resistance for carriers’ lateral transportation, a good transparency to avoid parasitic light absorption, and to enhance light trapping. The rear ITO is optimized for low absorption in the infrared region. The contacts are then screen printed on the front or on both sides of the cell depending if the aim is to obtain a bifacial solar cell. Finally, the samples are annealed at 200-250 °C for 30-60 min. Figure 2 shows a simplified flowchart of the manufacturing process of SHJ solar cells including photographs of the partly processed wafer after each process step.
Figure 2. Process steps to manufacture a silicon heterojunction solar cell
A short video of the silicon heterojunction solar cell fabrication process at ASU is shown in the video below.
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 S.Y. Herasimenka, W. J. Dauksher, C. J. Tracy, J. Lee, A. Augusto, H. Jain, K. Tyler, Z. Kiefer, P. Balaji, S. G. Bowden, C. Honsberg, “Front-and rear-emitter screen printed silicon heterojunction solar cells with> 20% efficiency”, Proceedings of the 31st EU PVSEC, 761-764 (2015). Available: https://www.eupvsec-proceedings.com/proceedings?paper=33333
Further reading: S. De Wolf, A. Descoeudres, Z.C. Holman, and C. Ballif. “High-efficiency silicon heterojunction solar cells: a review”, Green. 2(1), 7-24 (2012).